Computer Architecture Set 14

Computer Science Engineering (CSE)

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This set of Computer Architecture Multiple Choice Questions & Answers (MCQs) focuses on Computer Architecture Set 14

Q1 | The Sun micro systems processors usually follow            architecture.
  • cisc
  • isa
  • ultra sparc
  • risc
Answer: risc
Explaination:
the risc machine aims at reducing the instruction set of the computer.
Q2 | The RISC processor has a more complicated design than CISC.
  • true
  • false
Answer: false
Explaination:
the risc processor design is more simpler than cisc and it consists of fewer transistors.
Q3 | The iconic feature of the RISC machine among the following is                 
  • reduced number of addressing modes
  • increased memory size
  • having a branch delay slot
  • all of the mentioned
Answer: having a branch delay slot
Explaination:
a branch delay slot is an instruction space immediately following a jump or branch.
Q4 | Both the CISC and RISC architectures have been developed to reduce the
  • cost
  • time delay
  • semantic gap
  • all of the mentioned
Answer: semantic gap
Explaination:
the semantic gap is the gap between the high level language and the low level language.
Q5 | Pipe-lining is a unique feature of
  • risc
  • cisc
  • isa
  • iana
Answer: risc
Explaination:
the risc machine architecture was the first to implement pipe-lining.
Q6 | In CISC architecture most of the complex instructions are stored in            
  • register
  • diodes
  • cmos
  • transistors
Answer: transistors
Explaination:
in cisc architecture more emphasis is given on the instruction set
Q7 | Which of the architecture is power efficient?
  • cisc
  • risc
  • isa
  • iana
Answer: risc
Explaination:
hence the risc architecture is followed in the design of mobile devices.
Q8 | For converting a virtual address into the physical address, the programs are divided into                       
  • pages
  • frames
  • segments
  • blocks
Answer: pages
Explaination:
on the physical memory side the memory is divided into pages.
Q9 | The memory allocated to each page is contiguous.
  • true
  • false
Answer: true
Explaination:
each page might be allocated memory deferentially but the memory for one page will be continuous.
Q10 | The pages size shouldn’t be too small, as this would lead to                       
  • transfer errors
  • increase in operation time
  • increase in access time
  • decrease in performance
Answer: increase in access time
Explaination:
the access time of the magnetic disk is much longer than the access time of the memory.
Q11 | The cache bridges the speed gap between               and                       
  • ram and rom
  • ram and secondary memory
  • processor and ram
  • none of the mentioned
Answer: processor and ram
Explaination:
the cache is a hardware implementation to reduce the access time for processor operations.
Q12 | The virtual memory bridges the size and speed gap between                       and
  • ram and rom
  • ram and secondary memory
  • processor and ram
  • none of the mentioned
Answer: ram and secondary memory
Explaination:
the virtual memory basically works as an extension of the ram.
Q13 | The higher order bits of the virtual address generated by the processor forms the                 
  • table number
  • frame number
  • list number
  • page number
Answer: page number
Explaination:
the higher order bits indicate the page number which points
Q14 | The page length shouldn’t be too long because                         
  • it reduces the program efficiency
  • it increases the access time
  • it leads to wastage of memory
  • none of the mentioned
Answer: it leads to wastage of memory
Explaination:
if the size is more than the required size then the extra space gets wasted.
Q15 | The lower order bits of the virtual address forms the                       
  • page number
  • frame number
  • block number
  • offset
Answer: offset
Explaination:
this gives the offset within the page table.
Q16 | The area in the main memory that can hold one page is called as
  • page entry
  • page frame
  • frame
  • block
Answer: page frame
Explaination:
none.
Q17 | The starting address of the page table is stored in                       
  • tlb
  • r0
  • page table base register
  • none of the mentioned
Answer: page table base register
Explaination:
the register is used to
Q18 | The bits used to indicate the status of the page in the memory is called               
  • control bits
  • status bits
  • progress bit
  • none of the mentioned
Answer: control bits
Explaination:
these bits are used to store the status information of the program.
Q19 | The                 bit is used to indicate the validity of the page.
  • valid bit
  • invalid bit
  • correct bit
  • none of the mentioned
Answer: valid bit
Explaination:
the os first validates the page and then only moves from the page table.
Q20 | The bit used to store whether the page has been modified or not is called as                 
  • dirty bit
  • modify bit
  • relocation bit
  • none of the mentioned
Answer: dirty bit
Explaination:
this bit is set after the page in the table gets modified.
Q21 | The page table should be ideally situated within                           
  • processor
  • tlb
  • mmu
  • cache
Answer: mmu
Explaination:
the page table information is used for every read and access operation.
Q22 | If the page table is large then it is stored in                       
  • processor
  • main memory
  • disk
  • secondary storage
Answer: main memory
Explaination:
by storing the table on the ram the required operation’s speed is increased.
Q23 | When the page table is placed in the main memory, the                         is used to store the recently accessed pages.
  • mmu
  • tlb
  • r0
  • table
Answer: tlb
Explaination:
the tlb is used to store the page numbers of the recently accessed pages.
Q24 | The TLB is incorporated as part of the
  • processor
  • mmu
  • disk
  • ram
Answer: mmu
Explaination:
none.
Q25 | Whenever a request to the page that is not present in the main memory is accessed               is triggered.
  • interrupt
  • request
  • page fault
  • none of the mentioned
Answer: page fault
Explaination:
when a page fault is triggered, the os brings the required page into memory.
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