Computer Architecture Set 13

Computer Science Engineering (CSE)

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This set of Computer Architecture Multiple Choice Questions & Answers (MCQs) focuses on Computer Architecture Set 13

Q1 |                   constitute the representation of the floating number.
  • sign
  • significant digits
  • scale factor
  • all of the mentioned
Answer: all of the mentioned
Explaination:
the following factors are responsible for the representation of the number.
Q2 | The sign followed by the string of digits is called as               
  • significant
  • determinant
  • mantissa
  • exponent
Answer: mantissa
Explaination:
the mantissa also consists of the decimal point.
Q3 | The normalized representation of 0.0010110 * 2 9 is                 
  • 0 10001000 0010110
  • 0 10000101 0110
  • 0 10101010 1110
  • 0 11110100 11100
Answer: 0 10000101 0110
Explaination:
normalized representation is done by shifting the decimal point.
Q4 | The 32 bit representation of the decimal number is called as
  • double-precision
  • single-precision
  • extended format
  • none of the mentioned
Answer: single-precision
Explaination:
none.
Q5 | In 32 bit representation the scale factor as a range of                   
  • -128 to 127
  • -256 to 255
  • 0 to 255
  • none of the mentioned
Answer: -128 to 127
Explaination:
since the exponent field has only 8 bits to store the value.
Q6 | In double precision format, the size of the mantissa is               
  • 32 bit
  • 52 bit
  • 64 bit
  • 72 bit
Answer: 52 bit
Explaination:
the double precision format is also called as 64 bit representation.
Q7 |               have been developed specifically for pipelined systems.
  • utility software
  • speed up utilities
  • optimizing compilers
  • none of the mentioned
Answer: optimizing compilers
Explaination:
the compilers which are designed to remove redundant parts of the code are called as optimizing compilers.
Q8 | The pipelining process is also called as               
  • superscalar operation
  • assembly line operation
  • von neumann cycle
  • none of the mentioned
Answer: assembly line operation
Explaination:
it is called so because it performs its operation at the assembly level.
Q9 | To increase the speed of memory access in pipelining, we make use of
  • modification in processor architecture                 
  • clock
  • special unit
  • control unit
Answer: clock
Explaination:
the time cycle of the clock is adjusted to perform the interleaving.
Q10 | Each stage in pipelining should be completed within                         cycle.
  • 1
  • 2
  • 3
  • 4
Answer: 1
Explaination:
the stages in the pipelining should get completed within one cycle to increase the speed of performance.
Q11 | In pipelining the task which requires the least time is performed first.
  • true
  • false
Answer: false
Explaination:
this is done to avoid starvation of the longer task.
Q12 | If a unit completes its task before the allotted time period, then                 
  • special memory locations
  • special purpose registers
  • cache
  • buffers
Answer: cache
Explaination:
by using the cache we can reduce the speed of memory access by a factor of 10.
Q13 | The periods of time when the unit is idle is called as            
  • stalls
  • bubbles
  • hazards
  • both stalls and bubbles
Answer: both stalls and bubbles
Explaination:
the stalls are a type of hazards that affect a pipelined system.
Q14 | The contention for the usage of a hardware device is called               
  • structural hazard
  • stalk
  • deadlock
  • none of the mentioned
Answer: structural hazard
Explaination:
none.
Q15 | The throughput of a super scalar processor is                 
  • less than 1
  • 1
  • more than 1
  • not known
Answer: more than 1
Explaination:
the throughput of a processor is measured by using the number of instructions executed per second.
Q16 | When the processor executes multiple instructions at a time it is said to use
  • single issue
  • multiplicity
  • visualization
  • multiple issues
Answer: multiple issues
Explaination:
none.
Q17 | The               plays a very vital role in case of super scalar processors.
  • compilers
  • motherboard
  • memory
  • peripherals
Answer: compilers
Explaination:
the compilers are programmed to arrange the instructions to get more throughput.
Q18 | If an exception is raised and the succeeding instructions are executed completely, then the processor is said to have               
  • exception handling
  • imprecise exceptions
  • error correction
  • none of the mentioned
Answer: imprecise exceptions
Explaination:
the processor since as executed the following instructions even though an exception was raised, hence the exception is treated as imprecise.
Q19 | In super-scalar mode, all the similar instructions are grouped and executed together.
  • true
  • false
Answer: true
Explaination:
the instructions are grouped meaning that the instructions fetch and decode and other cycles are overlapped.
Q20 | Since it uses the out of order mode of execution, the results are stored in
  • buffers
  • special memory locations
  • temporary registers
  • tlb
Answer: temporary registers
Explaination:
the results are stored in temporary locations and are arranged afterward.
Q21 | The step where in the results stored in the temporary register is transferred into the permanent register is called as
  • final step
  • commitment step
  • last step
  • inception step
Answer: commitment step
Explaination:
none.
Q22 | A special unit used to govern the out of order execution of the instructions is called as               
  • commitment unit
  • temporal unit
  • monitor
  • supervisory unit
Answer: commitment unit
Explaination:
this unit monitors the execution of the instructions and makes sure that the final result is in order.
Q23 | The commitment unit uses a queue called               
  • record buffer
  • commitment buffer
  • storage buffer
  • none of the mentioned
Answer: record buffer
Explaination:
none.
Q24 | The CISC stands for                         
  • computer instruction set compliment
  • complete instruction set compliment
  • computer indexed set components
  • complex instruction set computer
Answer: complex instruction set computer
Explaination:
cisc is a computer architecture where in the processor performs more complex operations in one step.
Q25 | The computer architecture aimed at reducing the time of execution of instructions is                   
  • cisc
  • risc
  • isa
  • anna
Answer: risc
Explaination:
the risc stands for reduced instruction set computer.
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