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This set of Computer Architecture Multiple Choice Questions & Answers (MCQs) focuses on Computer Architecture Set 5
Q1 | What is subroutine nesting?
- having multiple subroutines in a program
- using a linking nest statement to put many subroutines under the same name
- having one routine call the other
- none of the mentioned
Q2 | The order in which the return addresses are generated and used is
- lifo
- fifo
- random
- highest priority
Q3 | In case of nested subroutines the return addresses are stored in
- system heap
- special memory buffers
- processor stack
- registers
Q4 | The appropriate return addresses are obtained with the help of in case of nested routines.
- mar
- mdr
- buffers
- stack-pointers
Q5 | When parameters are being passed on to the subroutines they are stored in
- registers
- memory locations
- processor stacks
- all of the mentioned
Q6 | The most efficient way of handling parameter passing is by using
- general purpose registers
- stacks
- memory locations
- none of the mentioned
Q7 | The most Flexible way of logging the return addresses of the subroutines is by using
- registers
- stacks
- memory locations
- none of the mentioned
Q8 | The private work space dedicated to a subroutine is called as
- system heap
- reserve
- stack frame
- allocation
Q9 | If the subroutine exceeds the private space allocated to it then the values are pushed onto
- stack
- system heap
- reserve space
- stack frame
Q10 | pointer is used to point to parameters passed or local parameters of the subroutine.
- stack pointer
- frame pointer
- parameter register
- log register
Q11 | The reserved memory or private space of the subroutine gets deallocated when
- the stop instruction is executed by the routine
- the pointer reaches the end of the space
- when the routine’s return statement is executed
- none of the mentioned
Q12 | The private space gets allocated to each subroutine when
- the first statement of the routine is executed
- when the context switch takes place
- when the routine gets called
- when the allocate instruction is executed
Q13 | the most suitable data structure used to store the return addresses in the case of nested subroutines.
- heap
- stack
- queue
- list
Q14 | In the case of nested subroutines, the stack top is always
- the saved contents of the called sub routine
- the saved contents of the calling sub routine
- the return addresses of the called sub routine
- none of the mentioned
Q15 | The stack frame for each subroutine is present in
- main memory
- system heap
- processor stack
- none of the mentioned
Q16 | The data structure suitable for scheduling processes is
- list
- heap
- queue
- stack
Q17 | The sub-routine service procedure is similar to that of the interrupt service routine in
- method of context switch
- returning
- process execution
- method of context switch & process execution
Q18 | In memory-mapped I/O
- the i/o devices and the memory share the same address space
- the i/o devices have a separate address space
- the memory and i/o devices have an associated address space
- a part of the memory is specifically set aside for the i/o operation
Q19 | The usual BUS structure used to connect the I/O devices is
- star bus structure
- multiple bus structure
- single bus structure
- node to node bus structure
Q20 | In intel’s IA-32 architecture there is a separate 16 bit address space for the I/O devices.
- false
- true
Q21 | The system is notified of a read or write operation by
- appending an extra bit of the address
- enabling the read or write bits of the devices
- raising an appropriate interrupt signal
- sending a special signal along the bus
Q22 | To overcome the lag in the operating speeds of the I/O device and the processor we use
- buffer spaces
- status flags
- interrupt signals
- exceptions
Q23 | The method of accessing the I/O devices by repeatedly checking the status flags is
- program-controlled i/o
- memory-mapped i/o
- i/o mapped
- none of the mentioned
Q24 | The method of synchronising the processor with the I/O device in which the device sends a signal when it is ready is?
- exceptions
- signal handling
- interrupts
- dma
Q25 | The interrupt-request line is a part of the
- data line
- control line
- address line
- none of the mentioned