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This set of Computer Architecture Multiple Choice Questions & Answers (MCQs) focuses on Computer Architecture Set 9
Q1 | The status flags required for data transfer is present in
- device
- device driver
- interface circuit
- none of the mentioned
Q2 | User programmable terminals that combine VDT hardware with built-in microprocessor is
- kips
- pc
- mainframe
- intelligent terminals
Q3 | Which most popular input device is used today for interactive processing and for the one line entry of data for batch processing?
- mouse
- magnetic disk
- visual display terminal
- card punch
Q4 | is used as an intermediate to extend the processor BUS.
- bridge
- router
- connector
- gateway
Q5 | is an extension of the processor BUS.
- scsi bus
- usb
- pci bus
- none of the mentioned
Q6 | What is the full form of ISA?
- international american standard
- industry standard architecture
- international standard architecture
- none of the mentioned
Q7 | What is the full form of ANSI?
- american national standards institute
- architectural national standards institute
- asian national standards institute
- none of the mentioned
Q8 | SCSI stands for
- signal computer system interface
- small computer system interface
- small coding system interface
- signal coding system interface
Q9 | ISO stands for
- international standards organisation
- international software organisation
- industrial standards organisation
- industrial software organisation
Q10 | The system developed by IBM with ISA architecture is
- sparc
- sun-sparc
- pc-at
- none of the mentioned
Q11 | IDE disk is connected to the PCI BUS using interface.
- isa
- iso
- ansi
- ieee
Q12 | IDE stands for
- integrated device electronics
- international device encoding
- industrial decoder electronics
- international decoder encoder
Q13 | The circuit enables the generation of the ASCII code when the key is pressed.
- generator
- debouncing
- encoder
- logger
Q14 | To overcome multiple signals being generated upon a single press of the button, we make use of
- generator circuit
- debouncing circuit
- multiplexer
- xor circuit
Q15 | The best mode of connection between devices which need to send or receive large amounts of data over a short distance is
- bus
- serial port
- parallel port
- isochronous port
Q16 | The output of the encoder circuit is/are
- ascii code
- ascii code and the valid signal
- encoded signal
- none of the mentioned
Q17 | The disadvantage of using a parallel mode of communication is
- it is costly
- leads to erroneous data transfer
- security of data
- all of the mentioned
Q18 | In a 32 bit processor, the A0 bit of the address line is connected to of the parallel port interface.
- valid bit
- idle bit
- interrupt enable bit
- status or data register
Q19 | The Status flag circuit is implemented using
- rs flip flop
- d flip flop
- jk flip flop
- xor circuit
Q20 | In the output interface of the parallel port, along with the valid signal is also sent.
- data
- idle signal
- interrupt
- acknowledge signal
Q21 | DDR stands for
- data direction register
- data decoding register
- data decoding rate
- none of the mentioned
Q22 | In a general 8-bit parallel interface, the INTR line is connected to
- status and control unit
- ddr
- register select
- none of the mentioned
Q23 | The mode of transmission of data, where one bit is sent for each clock cycle is
- asynchronous
- parallel
- serial
- isochronous
Q24 | The transformation between the Parallel and serial ports is done with the help of
- flip flops
- logic circuits
- shift registers
- none of the mentioned
Q25 | The serial port is used to connect basically and processor.
- i/o devices
- speakers
- printer
- monitor