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This set of Digital Electronics and Logic Design Multiple Choice Questions & Answers (MCQs) focuses on Digital Electronics And Logic Design Set 19

Q1 | Which of the following is not a form of multivibrator?
Q2 | A J-K flip-flop has two control inputs. What happens to the Q output on the active edge of the clock if both control inputs are asserted simultaneously?
Q3 | A master/slave bistable is formed using two bistable connected in series.
Q4 | An astable has two metastable states and produces the function of a digital oscillator
Q5 | In synchronous counters the clock input of each of the bistables are connected together so that each changes state at the same time.
Q6 | 1: When the maximum clock rate is quoted for a logic family, then it applies to a
Q7 | 2: The number of flip-flops required in a modulo N counter is
Q8 | 3: Flip-flop outputs are always
Q9 | 4: How many gates (minimum) are needed for a 3-bit up-counter using standard binary and using T lip-lops ? Assume unlimited fan-in.
Q10 | 5: The clear data and present input of the JK lip-lop are known as
Q11 | A mod-2 counter followed by a mod-5 counter is
Q12 | What is the maximum counting speed of a 4-bit binary counter which is composed of flip-flops with a propagation delay of 25 ns ?
Q13 | 8: A JK flip-lop has its J input connected to logic level 1 and its input to the Q output. A clock pulse is fed to its clock input. The flip-lop will now
Q14 | 9: Consider an RS lip-lops with both inputs set to 0. If a momentary '1' is applied at the input S,then the output
Q15 | The output of a sequential circuit depends on
Q16 | The ring counter is analogous to
Q17 | 12: In a digital counter circuit feedback loop is introduced to
Q18 | A J-K lip-lop has its J-input connected to logic level 1 and its input to the Q output pulse is fed to its clock input the flip-flop will now
Q19 | Which of the following conditions must be met to avoid race around problem ?
Q20 | Match List I with List II and select the correct answer form the codes given below the list List IA. A shift register can beB. A multiplexerC. A decoder can List II 1.for parallel to serial conversion2.to generate memory can be used chip select 3.for parallel to serial conversionCODES: A B C
Q21 | With the use of an electronic counter six capsules are to be filled in bottles automatically. In such a counter what will be the number of flip- flops required ?
Q22 | A pulse train can be delayed by a finite number of clock periods using
Q23 | How many illegitimate states has synchronous mod-6 counter ?
Q24 | A 2 bit binary multiplier can be implemented using
Q25 | A ring counter is same as