Digital Electronics And Logic Design Set 15 MCQs

Q1 | What is the minimum number of 2 input NAND gates required to implement the functionF = (x'+y') (z+w)

6

5

4

3

Q2 | How many truth tables can be made from one function table ?

one

two

three

any numbers

Q3 | What is the largest number of data inputs which a data selector with two control inputs can have ?

2

4

8

16

Q4 | A combinational circuit is one in which the output depends on the

input combination at the time

input combination and the previous output

input combination at that time and the previous input combination

present output and the previous output

Q5 | The function of a multiplexer is

to decode information

to select 1 out of n input data sources and to transmit it to single channel

to transit data on n lines

to perform serial to parallel conversion

Q6 | For the device shown here, let all D inputs be LOW, both S inputs be HIGH, and the input be LOW. What is the status of the Y output?

low

high

don\t care

cannot be determine d

Q7 | Convert BCD 0001 0010 0110 to binary.

1111110

1111000

1111101

1111111

Q8 | Convert BCD 0001 0111 to binary.

10101

10001

10010

11000

Q9 | How many 1-of-16 decoders are required for decoding a 7-bit binary number?

5

6

7

8

Q10 | The implementation of simplified sum-of-products expressions may be easily implemented into actual logic circuits using all universal gates with little or no increase in circuit complexity. (Select the response for the blank space that will BEST make the statement true.)

and/or

nand

nor

or/and

Q11 | Which of the following statements accurately represents the two BEST methods of logic circuit simplification?

boolean algebra and karnaugh mapping

karnaugh mapping and circuit waveform analysis

actual circuit trial and error evaluation and waveform analysis

boolean algebra and actual circuit trial and error evaluation

Q12 | Which of the following combinations cannot be combined into K-map groups?

corners in the same row

corners in the same column

diagonal corners

overlappin g combinati ons

Q13 | As a technician you are confronted with a TTL circuit board containing dozens of IC chips. You have taken several readings at numerous IC chips, but the readings are inconclusive because of their erratic nature. Of the possible faults listed, select the one that most probably is causing the problem.

a defective ic chip that is drawing excessive current from the power supply

a solar bridge between the inputs on the first ic chip on the board

an open input on the first ic chip on the board

adefective output ic chip that has an internal open to v cc

Q14 | Which gate is best used as a basic comparator?

nor

or

exclusive-or

and

Q15 | The device shown here is most likely a .

comparator

multiplexer

demultiplexe r

parity generator

Q16 | For the device shown here, assume the D input is LOW, both S inputs are HIGH, and the input is HIGH. What is the status of the outputs?

all are high.

all are low.

all but are low.

all but are high.

Q17 | In VHDL, macrofunctions is/are:

digital circuits.

analog circuits.

a set of bit vectors.

preprogra mmed ttldevices.

Q18 | Which of the following expressions is in the product-of-sums form?

(a + b )(c + d )

(ab )(cd )

ab (cd )

ab + cd

Q19 | Which of the following is an important feature of the sum-of-products form of expressions?

all logic circuits are reduced to nothing more than simple and and or operations.

the delay times are greatly reduced over other forms.

no signal must pass through more than two gates, not including inverters.

the maximum number of gates that any signal must pass through is reduced by a factor of two.

Q20 | An output gate is connected to four input gates; the circuit does not function. Preliminary tests with the DMM indicate that the power is applied; scope tests show that the primary input gate has a pulsing signal, while the interconnecting node has no signal. The four load gates are all on different ICs. Which instrument will best help isolate the problem?

current tracer

logic probe

oscilloscope

logic analyzer

Q21 | The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

a > b = 1, a < b= 0, a < b = 1

a > b = 0, a < b = 1, a = b = 0

a > b = 1, a < b = 0, a = b = 0

a > b = 0, a < b = 1, a = b = 1

Q22 | A logic probe is placed on the output of a gate and the display indicator is dim. A pulser is used on each of the input terminals, but the output indication does not change. What is wrong?

the output of the gate appears to be open.

the dim indication on the logic probe indicates that the supply voltage is probably low.

the dim indication is a result of a bad ground connection on the logic probe.

the gate may be a tristate device.

Q23 | Each "1" entry in a K-map square represents:

a high for each input truth table condition that produces a high output.

a highoutput on the truth table for all low input combination s.

a lowoutput for all possible high input conditions.

a don\t carecondition for all possible input truth table combinati ons.

Q24 | Looping on a K-map always results in the elimination of:

variables within the loop that appear only in their complemented form.

variables that remain unchanged within the loop.

variables within the loop that appear in both complemente d and uncompleme nted form.

variables within the loop that appear only in their uncomple mented form.

Q25 | What will a design engineer do after he/she is satisfied that the design will work?

put it in a flow chart

program a chip and test it

give the design to a technician to verify the design

perform a vector test