High Performance Computing Set 1

Computer Science Engineering (CSE)

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This set of High Performance Computing HPC Multiple Choice Questions & Answers (MCQs) focuses on High Performance Computing Set 1

Q1 | A CUDA program is comprised of two primary components: a host and a _____.
Q2 | The kernel code is dentified by the ________qualifier with void return type
Q3 | The kernel code is only callable by the host
Q4 | The kernel code is executable on the device and host
Q5 | Calling a kernel is typically referred to as _________.
Q6 | Host codes in a CUDA application can Initialize a device
Q7 | Host codes in a CUDA application can Allocate GPU memory
Q8 | Host codes in a CUDA application can not Invoke kernels
Q9 | CUDA offers the Chevron Syntax to configure and execute a kernel.
Q10 | the BlockPerGrid and ThreadPerBlock parameters are related to the ________ model supported by CUDA.
Q11 | _________ is Callable from the device only
Q12 | ______ is Callable from the host
Q13 | ______ is Callable from the host
Q14 | CUDA supports ____________ in which code in a single thread is executed by all other threads.
Q15 | In CUDA, a single invoked kernel is referred to as a _____.
Q16 | A grid is comprised of ________ of threads.
Q17 | A block is comprised of multiple _______.
Q18 | a solution of the problem in representing the parallelismin algorithm is
Q19 | Host codes in a CUDA application can not Reset a device
Q20 | Host codes in a CUDA application can Transfer data to and from the device
Q21 | Host codes in a CUDA application can not Deallocate memory on the GPU
Q22 | Any condition that causes a processor to stall is called as _____.
Q23 | The time lost due to branch instruction is often referred to as _____.
Q24 | _____ method is used in centralized systems to perform out of order execution.
Q25 | The computer cluster architecture emerged as an alternative for ____.
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