High Performance Computing Set 1

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This set of High Performance Computing HPC Multiple Choice Questions & Answers (MCQs) focuses on High Performance Computing Set 1

Q1 | A CUDA program is comprised of two primary components: a host and a _____.
  • gpu??kernel
  • cpu??kernel
  • os
  • none of above
Q2 | The kernel code is dentified by the ________qualifier with void return type
  • _host_
  • __global__??
  • _device_
  • void
Q3 | The kernel code is only callable by the host
  • true
  • false
Q4 | The kernel code is executable on the device and host
  • true
  • false
Q5 | Calling a kernel is typically referred to as _________.
  • kernel thread
  • kernel initialization
  • kernel termination
  • kernel invocation
Q6 | Host codes in a CUDA application can Initialize a device
  • true
  • false
Q7 | Host codes in a CUDA application can Allocate GPU memory
  • true
  • false
Q8 | Host codes in a CUDA application can not Invoke kernels
  • true
  • false
Q9 | CUDA offers the Chevron Syntax to configure and execute a kernel.
  • true
  • false
Q10 | the BlockPerGrid and ThreadPerBlock parameters are related to the ________ model supported by CUDA.
  • host
  • kernel
  • thread??abstraction
  • none of above
Q11 | _________ is Callable from the device only
  • _host_
  • __global__??
  • _device_
  • none of above
Q12 | ______ is Callable from the host
  • _host_
  • __global__??
  • _device_
  • none of above
Q13 | ______ is Callable from the host
  • _host_
  • __global__??
  • _device_
  • none of above
Q14 | CUDA supports ____________ in which code in a single thread is executed by all other threads.
  • tread division
  • tread termination
  • thread abstraction
  • none of above
Q15 | In CUDA, a single invoked kernel is referred to as a _____.
  • block
  • tread
  • grid
  • none of above
Q16 | A grid is comprised of ________ of threads.
  • block
  • bunch
  • host
  • none of above
Q17 | A block is comprised of multiple _______.
  • treads
  • bunch
  • host
  • none of above
Q18 | a solution of the problem in representing the parallelismin algorithm is
  • cud
  • pta
  • cda
  • cuda
Q19 | Host codes in a CUDA application can not Reset a device
  • true
  • false
Q20 | Host codes in a CUDA application can Transfer data to and from the device
  • true
  • false
Q21 | Host codes in a CUDA application can not Deallocate memory on the GPU
  • true
  • false
Q22 | Any condition that causes a processor to stall is called as _____.
  • hazard
  • page fault
  • system error
  • none of the above
Q23 | The time lost due to branch instruction is often referred to as _____.
  • latency
  • delay
  • branch penalty
  • none of the above
Q24 | _____ method is used in centralized systems to perform out of order execution.
  • scorecard
  • score boarding
  • optimizing
  • redundancy
Q25 | The computer cluster architecture emerged as an alternative for ____.
  • isa
  • workstation
  • super computers
  • distributed systems