Embedded And Real Time System Set 1

Electrical Engineering

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This set of Embedded and Real Time System Multiple Choice Questions & Answers (MCQs) focuses on Embedded And Real Time System Set 1

Q1 | Computer has a built-in system clock that emits millions of regularly spaced electric pulses per            called clock cycles.
  • second
  • millisecond
  • microsecond
  • minute
Answer: second
Explaination:
the regularly spaced electric pulses per second are referred to as the clock cycles. all the jobs performed by the processor are on the basis of clock cycles.
Q2 | It takes one clock cycle to perform a basic operation.
  • true
  • false
Answer: true
Explaination:
it takes exactly one clock cycle to perform a basic operation, such as moving a byte of memory from a location to another location in the computer.
Q3 | The operation that does not involves clock cycles is                    
  • installation of a device
  • execute
  • fetch
  • decode
Answer: installation of a device
Explaination:
normally, several clock cycles are required to fetch, execute and decode a particular program.
Q4 | The number of clock cycles per second is referred as                  
  • clock speed
  • clock frequency
  • clock rate
  • clock timing
Answer: clock speed
Explaination:
the number of clock cycles per second is the clock speed. it is generally measured in gigahertz(109 cycles/sec) or megahertz (106 cycles/sec).
Q5 | CISC stands for                          
  • complex information sensed cpu
  • complex instruction set computer
  • complex intelligence sensed cpu
  • complex instruction set cpu
Answer: complex instruction set computer
Explaination:
cisc is a large instruction set computer. it has variable length instructions. it also has variety of addressing modes.
Q6 | Which of the following processor has a fixed length of instructions?
  • cisc
  • risc
  • epic
  • multi-core
Answer: risc
Explaination:
the risc which stands for
Q7 | Processor which is complex and expensive to produce is                  
  • risc
  • epic
  • cisc
  • multi-core
Answer: cisc
Explaination:
cisc stands for complex instruction set computer. it is mostly used in personal computers. it has a large instruction set and a variable length of instructions.
Q8 | The architecture that uses a tighter coupling between the compiler and the processor is                          
  • epic
  • multi-core
  • risc
  • cisc
Answer: epic
Explaination:
epic stands for explicitly parallel instruction computing. it has a tighter coupling between the compiler and the processor. it enables the compiler to extract maximum parallelism in the original code.
Q9 | MAR stands for                        
  • memory address register
  • main address register
  • main accessible register
  • memory accessible register
Answer: memory address register
Explaination:
the mar stands for memory
Q10 | Which of the following allows the reuse of the software and the hardware components?
  • platform based design
  • memory design
  • peripheral design
  • input design
Answer: platform based design
Explaination:
the platform design allows the reuse of the software and the hardware components in order to cope with the increasing complexity in the design of embedded systems.
Q11 | Which of the following is the design in which both the hardware and software are considered during the design?
  • platform based design
  • memory based design
  • software/hardware codesign
  • peripheral design
Answer: software/hardware codesign
Explaination:
the software/hardware codesign is the one which having both hardware and software design concerns. this
Q12 | What does API stand for?
  • address programming interface
  • application programming interface
  • accessing peripheral through interface
  • address programming interface
Answer: application programming interface
Explaination:
the platform-based design helps in the reuse of both the hardware and the software components. the application programming interface helps in extending the platform towards software applications.
Q13 | Which activity is concerned with identifying the task at the final embedded systems?
  • high-level transformation
  • compilation
  • scheduling
  • task-level concurrency management
Answer: task-level concurrency management
Explaination:
there are many design activities associated with the platforms in the embedded system and one such is the task- level concurrency management which helps in identifying the task that needed to be present in the final embedded systems.
Q14 | In which design activity, the loops are interchangeable?
  • compilation
  • scheduling
  • high-level transformation
  • hardware/software partitioning
Answer: high-level transformation
Explaination:
the high-level transformation is responsible for the high optimizing transformations, that is, the loops can be interchanged so that the accesses to array components become more local.
Q15 | Which design activity helps in the transformation of the floating point arithmetic to fixed point arithmetic?
  • high-level transformation
  • scheduling
  • compilation
  • task-level concurrency management
Answer: high-level transformation
Explaination:
the high-level transformation are responsible for the high optimizing transformations, that is, for the loop interchanging and the transformation of the floating point arithmetic to the fixed point arithmetic can be done by the high-level transformation.
Q16 | Which design activity is in charge of mapping operations to hardware?
  • scheduling
  • high-level transformation
  • hardware/software partitioning
  • compilation
Answer: hardware/software partitioning
Explaination:
the hardware/software partitioning is the activity which is in charge of mapping operations to the software or to the hardware.
Q17 | Which of the following is approximated during hardware/software partitioning, during task-level concurrency management?
  • scheduling
  • compilation
  • task-level concurrency management
  • high-level transformation
Answer: scheduling
Explaination:
the scheduling is performed in several contexts. it should be approximated with the other design activities like the compilation, hardware/software partitioning, and task-level concurrency management. the scheduling should be precise for the final code.
Q18 | Which of the following is a process of analyzing the set of possible designs?
  • design space exploration
  • scheduling
  • compilation
  • hardware/software partitioning
Answer: design space exploration
Explaination:
the design space exploration is the process of analyzing the set of designs and the design which meet the specification is selected.
Q19 | Which of the following is a meet-in-the- middle approach?
  • peripheral based design
  • platform based design
  • memory based design
  • processor design
Answer: platform based design
Explaination:
the platform is an abstraction layer which covers many possible refinements to a lower level and is mainly follows a meet-in-the-middle approach.
Q20 | Which of the following is the design in which both the hardware and software are considered during the design?
  • platform based design
  • memory based design
  • software/hardware codesign
  • peripheral design
Answer: software/hardware codesign
Explaination:
the software/hardware codesign is the one which having both hardware and software design concerns. this will help in the right combination of the hardware and the software for the efficient product.
Q21 | Architectural design is a creative process satisfying only functional-requirements of a system.
  • true
  • false
Answer: false
Explaination:
in architectural design you
Q22 | A                  view shows the system hardware and how software components are distributed across the processors in the system.
  • physical
  • logical
  • process
  • all of the mentioned
Answer: physical
Explaination:
a physical view is implemented by system engineers implementing the system hardware.
Q23 | The UML was designed for describing
  • object-oriented systems
  • architectural design
  • srs
  • both object-oriented systems and architectural design
Answer: both object-oriented systems and architectural design
Explaination:
the uml was designed for describing object-oriented systems and, at the architectural design stage, you often want to describe systems at a higher level of abstraction.
Q24 | Which of the following view shows that the system is composed of interacting processes at run time?
  • physical
  • development
  • logical
  • process
Answer: process
Explaination:
this view is useful for making judgments about non-functional system characteristics such as performance and availability.
Q25 | Which of the following is an architectural conflict?
  • using large-grain components improves performance but reduces maintainability
  • introducing redundant data improves availability but makes security more difficult
  • localizing safety-related features usually means more communication so degraded performance
  • all of the mentioned
Answer: all of the mentioned
Explaination:
high availability architecture can be affected by several design factors that are required to be maintained to ensure that no single points of failure exist in such design.
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