Microprocessor And Interfacing Technique Set 4
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This set of Microprocessor and Interfacing Technique Multiple Choice Questions & Answers (MCQs) focuses on Microprocessor And Interfacing Technique Set 4
Q1 | Each memory location has:
- address
- contents
- both a and b
- none of these
Q2 | 80386 has ---bit address bus?
- 8
- 16
- 32
- 64
Q3 | 80386 has – BIT data bus?
- 8
- 16
- 32
- 64
Q4 | Which flag are used to record specific characteristics of arithmetic and logical instructions:
- the stack
- the stand
- the status
- the queue
Q5 | The size of each segment in 8086 is:
- 64 kb
- 24 kb
- 50 kb
- 16kb
Q6 | The pin configuration of 8086 is available in the :
- 40 pin
- 50
- 20
- 30
Q7 | DIP stand for:
- deal inline package
- dual inlinepackage
- direct inline package
- digital inline package
Q8 | SBA stand for:
- segment bus address
- segment bit address
- segment base address
- segment byte address
Q9 | BP stand for:
- bit pointer
- base pointer
- bus pointer
- byte pointer
Q10 | ALE stand for:
- address latch enable
- address light enable
- address lower enable
- addresslast enable
Q11 | The offset of a particular segment varies from :
- 000h to fffh
- 0000h to ffffh
- 00h to ffh
- 00000h tofffffh
Q12 | by the microprocessor:
- cache memory
- data memory
- main memory
- all of these
Q13 | which is the small amount of high- speed memory used to work directly with the microprocessor:
- cache
- case
- cost
- coos
Q14 | The cache usually gets its data from the whenever the instruction or data is required by the CPU:
- main memory
- case memory
- cache memory
- all of these
Q15 | Which causes the microprocessor to immediately terminate its present activity:
- reset signal
- interuptsignal
- both
- none of these