Digital Principles And System Design Set 3
On This Page
This set of Digital Principles and System Design Multiple Choice Questions & Answers (MCQs) focuses on Digital Principles And System Design Set 3
Q1 | A variable on its own or in its complemented form is known as a
- product term
- literal
- sum term
- word
Q2 | Maxterm is the sum of of the corresponding Minterm with its literal complemented.
- terms
- words
- numbers
- nibble
Q3 | Canonical form is a unique way of representing
- sop
- minterm
- boolean expressions
- pos
Q4 | There are Minterms for 3 variables (a, b, c).
- 0
- 2
- 8
- 1
Q5 | expressions can be implemented using either (1) 2-level AND-OR logic circuits or (2) 2-level NAND logic circuits.
- pos
- literals
- sop
- pos
Q6 | There are cells in a 4-variable K-map.
- 12
- 16
- 18
- 8
Q7 | The K-map based Boolean reduction is based on the following Unifying Theorem: A + A’ = 1.
- impact
- non impact
- force
- complementarity
Q8 | Each product term of a group, w’.x.y’ and w.y, represents the in that group.
- input
- pos
- sum-of-minterms
- sum of maxterms
Q9 | The prime implicant which has at least one element that is not present in any other implicant is known as
- essential prime implicant
- implicant
- complement
- prime complement
Q10 | Product-of-Sums expressions can be implemented using
- 2-level or-and logic circuits
- 2-level nor logic circuits
- 2-level xor logic circuits
- both 2-level or-and and nor logic circuits
Q11 | Each group of adjacent Minterms (group size in powers of twos) corresponds to a possible product term of the given
- function
- value
- set
- word
Q12 | Don’t care conditions can be used for simplifying Boolean expressions in
- registers
- terms
- k-maps
- latches
Q13 | It should be kept in mind that don’t care terms should be used along with the terms that are present in
- minterms
- expressions
- k-map
- latches
Q14 | Using the transformation method you can realize any POS realization of OR-AND with only.
- xor
- nand
- and
- nor
Q15 | There are many situations in logic design in which simplification of logic expression is possible in terms of XOR and operations.
- x-nor
- xor
- nor
- nand
Q16 | In case of XOR/XNOR simplification we have to look for the following
- diagonal adjacencies
- offset adjacencies
- straight adjacencies
- both diagonal and offset adjencies
Q17 | Entries known as mapping.
- diagonal
- straight
- k
- boolean
Q18 | The code where all successive numbers differ from their preceding number by single bit is
- alphanumeric code
- bcd
- excess 3
- gray
Q19 | How many AND gates are required to realize Y = CD + EF + G?
- 4
- 5
- 3
- 2
Q20 | The NOR gate output will be high if the two inputs are
- 00
- 01
- 10
- 11
Q21 | How many two-input AND and OR gates are required to realize Y = CD+EF+G?
- 2, 2
- 2, 3
- 3, 3
- 3, 2
Q22 | A full adder logic circuit will have
- two inputs and one output
- three inputs and three outputs
- two inputs and two outputs
- three inputs and two outputs
Q23 | How many two input AND gates and two input OR gates are required to realize Y = BD + CE + AB?
- 3, 2
- 4, 2
- 1, 1
- 2, 3
Q24 | Which of following are known as universal gates?
- nand & nor
- and & or
- xor & or
- ex-nor & xor
Q25 | Which of the circuits in figure (a to d) is the sum-of- products implementation of figure (e)?
- x=ab’+a’b
- x=(ab)’+ab
- x=(ab)’+a’b’
- x=a’b’+ab