Digital Principles And System Design Set 20
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This set of Digital Principles and System Design Multiple Choice Questions & Answers (MCQs) focuses on Digital Principles And System Design Set 20
Q1 | How many NOT gates are required for the construction of a 4-to-1 multiplexer?
- 3
- 4
- 2
- 5
Q2 | In the given 4-to-1 multiplexer, if c1 = 0 and c0 = 1 then the output M is
- x0
- x1
- x2
- x3
Q3 | The enable input is also known as
- select input
- decoded input
- strobe
- sink
Q4 | The full form of HDL is
- higher descriptive language
- higher definition language
- hardware description language
- high descriptive language
Q5 | The full form of VHDL is
- very high descriptive language
- verilog hardware description language
- variable definition language
- none of the mentioned
Q6 | VHSIC stands for
- very high speed integrated circuits
- very higher speed integration circuits
- variable high speed integrated circuits
- variable higher speed integration circuits
Q7 | VHDL is being used for
- documentation
- verification
- synthesis of large digital design
- all of the mentioned
Q8 | The use of VHDL can be done in ways.
- 2
- 3
- 4
- 5
Q9 | At high frequencies when the sampling interval is too long in a frequency counter
- the counter works fine
- the counter undercounts the frequency
- the measurement is less precise
- the counter overflows
Q10 | The output frequency related to the sampling interval of a frequency counter as
- directly with the sampling interval
- inversely with the sampling interval
- more precision with longer sampling interval
- less precision with longer sampling interval
Q11 | In an HDL application of a stepper motor, what is done next after an up/down counter is built?
- build the sequencer
- test it on a simulator
- test the decoder
- design an intermediate integer variable
Q12 | In a digital clock application, the basic frequency must be divided down as
- 1 hz
- 60 hz
- 100 hz
- 1000 hz
Q13 | What does the data signal do in the keypad application?
- the row and column encoded data
- the ring encoded data
- the freeze locator data
- the ring counter data
Q14 | When a key is pressed, what does the ring counter in the HDL keypad application do?
- count to find the row
- freeze
- count to find the column
- start the d flip-flop
Q15 | A step which should be followed in project management is known as
- overall definition
- system documentation
- synthesis and testing
- system integration
Q16 | In the keypad application, the preset state of the ring counter define
- the nanding of the columns
- the nanding of the rows
- the proper output of the column encoder
- the proper output of the row encoder
Q17 | A major block which is not a part of an HDL frequency counter
- timing and control unit
- decoder/display
- display register
- bit shifter
Q18 | A stepper motor HDL application must include
- sequencers and multiplexers
- types and bits
- counters and decoders
- variables and processes
Q19 | Which of the following is a not a characteristics of combinational circuits?
- the output of combinational circuit depends on present input
- there is no use of clock signal in combinational circuits
- the output of combinational circuit depends on previous output
- there is no storage element in combinational circuit
Q20 | 11 HDL MODELS OF COMBINATIONAL CIRCUITS
- true
- false
Q21 | Which of the following is not a combinational circuit?
- adder
- code convertor
- multiplexer
- counter
Q22 | In a given combinational circuit, the concurrent statements are used with selected assignments using WHEN and ELSE keyword. What is the other alternative to implement the same?
- with-select
- with-select-when
- if-else
- case
Q23 | For using a process to implement a combinational circuit, which signals should be in the sensitivity list?
- inputs of the circuit
- outputs of the circuit
- both of the inputs and outputs
- no signal should be in the sensitivity list
Q24 | A 4 to 16 decoder can be used as a code converter. What will be the inputs and outputs of the converter respectively?
- binary, octal
- octal, binary
- hexadecimal, binary
- binary, hexadecimal
Q25 | Latches constructed with NOR and NAND gates tend to remain in the latched condition due to which configuration feature?
- low input voltages
- synchronous operation
- gate impedance
- cross coupling