Digital Electronics And Logic Design Set 9
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This set of Digital Electronics and Logic Design Multiple Choice Questions & Answers (MCQs) focuses on Digital Electronics And Logic Design Set 9
Q1 | It is best not to leave unused TTL inputs unconnected (open) because of TTL's
- noise sensitivity
- low-current requirement
- open- collector outputs
- tristate constructi on
Q2 | Which logic family combines the advantages of CMOS and TTL?
- bicmos
- ttl/cmos
- ecl
- ttl/mos
Q3 | Which is not part of emitter-coupled logic (ECL)?
- differential amplifier
- bias circuit
- emitter- follower circuit
- totem- pole circuit
Q4 | PMOS and NMOS circuits are used largely in
- msi functions
- lsi functions
- diode functions
- ttlfunctions
Q5 | The nominal value of the dc supply voltage for TTL and CMOS is
- 3 v
- 5 v
- 10 v
- 12 v
Q6 | If ICCH is specified as 1.1 mA when VCC is 5 V and if the gate is in a static (noncharging) HIGH output state, the power dissipation (PD) of the gate is
- 5.5 mw
- 5mw
- 5.5 w
- 1.1mw
Q7 | The switching speed of CMOS is now
- competitive with ttl
- three times that of tt
- slower than ttl
- twice that of ttl
Q8 | One advantage TTL has over CMOS is that TTL is
- less expensive
- not sensitive to electrostatic discharge
- faster
- more widely available
Q9 | TTL operates from a
- 9-volt suppl
- 3-volt supply
- 12-volt supply
- 5-volt supply
Q10 | A CMOS IC operating from a 3-volt supply will consume
- less power than a ttl ic
- more power than a ttl ic
- the same power as a ttl ic
- no power at all
Q11 | CMOS IC packages are available in
- dipconfiguration
- soicconfiguration
- dip and soic configuration s
- none of this
Q12 | The terms "low speed" and "high speed," applied to logic circuits, refer to the
- rise time
- fall time
- propagation delay time
- clock speed
Q13 | The power dissipation, PD, of a logic gate is the product of the
- dc supplyvoltage and
- dc supplyvoltage and
- ac supplyvoltage and
- ac supplyvoltage
Q14 | How many different logic level ranges for TTL
- 1
- 2
- 3
- 4
Q15 | Metal-oxide semiconductor field-effect transistors (MOSFETs) are the active switching elements in
- cmos circuits
- ttl
- ecl circuits
- pmoscircuits
Q16 | ECL IC technology is……………….than TTL technology.
- faster
- slower
- equal
- none of this
Q17 | A major advantage of ECL logic over TTL and CMOS is
- low power dissipation
- high speed
- both low power dissipation and high speed
- neither low power dissipationnor high speed
Q18 | Digital technologies being used now-a-days are
- dtl and emos
- ttl, ecl,cmos and rtl
- ttl, ecl,cmos and dtl
- ttl, ecl,cmos and dtl
Q19 | Which of the following is the fastest logic
- ttl
- ecl
- cmos
- pmos
Q20 | CMOS circuits are extensively used for ON-chip computers mainly because of their extremely
- low power dissipation
- high noise immunity
- large packing density
- low cost.
Q21 | The MSI chip 7474 is
- dual edge triggered jk flip-flop (ttl).
- dual edge triggered d flip-flop (cmos).
- dual edge triggered d flip-flop (ttl).
- dual edge triggered jk flip-flop (cmos).
Q22 | The logic 0 level of a CMOS logic device is approximately
- 1.2 volts
- 0.4 volts
- 5 volts
- 0 volts
Q23 | What is unique about TTL devices such as the 74SXX?
- these devices use schottky transistors and diodes to prevent them from going into saturation; this results in faster turn-on and turn-off times, which translates into higher frequency operation.
- the gate transistors are silicon (s), and the gates therefore have lower values of leakage current.
- the s denotes the fact that a single gate is present in the ic rather than the usual package of 2–6 gates.
- the s denotes a slow version of the device, which is a consequen ce of its higher power rating.
Q24 | Which of the following logic families has the shortest propagation delay?
- cmos
- bicmos
- ecl
- 74sxx
Q25 | Why must CMOS devices be handled with care?
- so they don’t get dirty
- because they break easily
- because they can be damaged by static electricity discharge
- all of above