Digital Electronics And Logic Design Set 12
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This set of Digital Electronics and Logic Design Multiple Choice Questions & Answers (MCQs) focuses on Digital Electronics And Logic Design Set 12
Q1 | The highest noise margin is offered by
- cmos
- ttl
- ecl
- bicmos
Q2 | What is the transitive voltage for the voltage input of a CMOS operating from 10V supply ?
- 1v
- 5v
- 10v
- 20v
Q3 | Which of the following logic families is well suited for high-speed operations ?
- ttl
- ecl
- mos
- cmos
Q4 | Which of the following is the fastest logic?
- ecl
- ttl
- mos
- cmos
Q5 | he digital logic family which has the lowest propagation delay time is
- ecl
- ttl
- cmos
- pmos
Q6 | Which of the following statements is wrong ?
- propagation delay is the time required for a gate to change its state
- noise immunity is the amount of noise which can be applied to the input of a gate without causing the gate to change state
- fan-in of a gate is always equal to fan-out of the same gate
- operating speed is the maximum frequency at which digital data can be applied to a gate
Q7 | Which table shows the logical state of a digital circuit output for every possible combination of logical states in the inputs ?
- function table
- truth table
- routing table
- asciitable
Q8 | The digital logic family which has minimum power dissipation is
- ttl
- ecl
- mos
- cmos
Q9 | In the following question, match each of the items A, B and C on the left with an approximation item on the rightA. Shift register can be used 1. for code conversionB. A multiplexer can be used 2. to generate memory slipto selectC. A decoder can be used 3. for parallel to serial conversion4. as many to one switch5. for analog to digital conversion
- a b c1 2 3
- a b c3 4 1
- a b c5 4 2
- a b c1 3 5
Q10 | A standard SOP form has terms that have all the variables in the domain of the expression.
- sum
- sub
- mult
- div
Q11 | How many data select lines are required for selecting eight inputs?
- 1
- 2
- 3
- 4
Q12 | Half adder circuit is ?
- half of an and gate
- a circuit to add two bits together
- half of a nand gate
- none of above
Q13 | The full adder adds the Kth bits of two numbers to the
- difference of the previous bits
- sum of all previous bits
- carry from ( k - 1 )th bit
- sum of previous bit
Q14 | The number of two input multiplexers required to construct a 210 input multiplexer is,
- 31
- 10
- 127
- 1023
Q15 | A small dot or circle printed on top of an IC indicates
- vcc
- gnd
- pin 14
- pin 1
Q16 | Which of the following adders can add three or more numbers at a time ?
- parallel adder
- carry-look- ahead adder
- carry-save- adderd.
- full adder
Q17 | An AND circuit
- is a memory circuit
- gives an output when all input signals are present simultaneous ly
- is a -ve or gate
- is a linear circuit
Q18 | What are the three output conditions of a three-state buffer?
- high, low,float
- 1, 0, float
- both of the above
- neither of the above
Q19 | The device which changes from serial data to parallel data is
- counter
- multiplexe r
- demultiple xer
- flip-flop
Q20 | A device which converts BCD to Seven Segment is called
- multiplexer
- demultipl exer
- encoder
- decoder
Q21 | How many 3-line-to-8-line decoders are required for a 1-of-32 decoder?
- 1
- 2
- 4
- 8
Q22 | A device which converts BCD to Seven Segment is called
- encoder
- decoder
- multiplexer
- demultiple xer
Q23 | A multiplexer is a logic circuit that
- accepts one input and gives several output
- accepts many inputs and gives many output
- accepts many inputs and gives one output
- accepts one input and gives one output
Q24 | In order to implement a n variable switching function, a MUX must have
- 2n inputs
- 2n+1 inputs
- 2n-1 inputs
- 2n-1inputs
Q25 | A latch is constructed using two cross-coupled
- and and or gates
- and gates
- nand and nor gates
- nandgates