Digital Electronics And Logic Design Set 10
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This set of Digital Electronics and Logic Design Multiple Choice Questions & Answers (MCQs) focuses on Digital Electronics And Logic Design Set 10
Q1 | What should be done to unused inputs on TTL gates?
- they should be left disconnected so as not to produce a load on any of the other circuits and to minimize power loading on the voltage source.
- all unused gates should be connected together and tied to v through a 1 k resistor.
- all unused inputs should be connected to an unused output; this will ensure compatible loading on both the unused inputs and unused outputs.
- unused and and nandinputs should be tied to vccthrough a 1 k resistor; unused or and norinputs should be grounded.
Q2 | Assume that a particular IC has a supply voltage (Vcc) equal to +5 V and ICCH = 10 mA and ICCL = 23 mA. What is the power dissipation for the chip?
- 50 mw
- 82.5 mw
- 115 mw
- 165 mw
Q3 | Can a 74HCMOS logic gate directly connect to a 74ALSTTL gate?
- yes
- no
Q4 | What is the major advantage of ECL logic?
- very high speed
- wide range of operating voltage
- very low cost
- very high power
Q5 | As a general rule, the lower the value of the speed–power product, the better the device because of its:
- long propagation delay and high power consumption
- long propagation delay and low power consumption
- both
- none of above
Q6 | What is the difference between the 54XX and 74XX series of TTL logic gates?
- 54xx is faster.
- 54xx is slower.
- 54xx has a wider power supply and expanded temperature range.
- 54xx has a narrower power supply andcontractedtemperatu re range.
Q7 | What is the range of invalid TTL output voltage?
- 0.0–0.4 v
- 0.4–2.4 v
- 2.4–5.0 v
- 0.0–5.0 v
Q8 | An open collector output can current, but it cannot .
- sink, source current
- source, sink current
- sink, source voltage
- source, sink voltage
Q9 | Why is a decoupling capacitor needed for TTL ICs and where should it be connected
- to block dc, connect to input pins
- to reduce noise, connect to input pins
- to reduce the effects of noise, connect between power supply and ground
- none of above
Q10 | Which of the following summarizes the important features of emitter- coupled logic (ECL)?
- low noise margin, low output voltage swing, negative voltage operation, fast, and high power consumption
- good noise immunity, negative logic, high- frequency capability, low power dissipation, and short propagation time
- low propagation time, high- frequency response, low power consumption, and high output voltage swings
- poor noise immunity, positive supply voltage operation, good low- frequency operation, and low power
Q11 | Why is a pull-up resistor needed for an open collector gate?
- to provide vcc for the ic
- to provide ground for the ic
- to provide the high voltage
- to provide the low voltage
Q12 | Why is a pull-up resistor needed when connecting TTL logic to CMOS logic?
- to increase the output low voltage
- to decrease the output low voltage
- to increase the output high voltage
- to decrease the output highvoltage
Q13 | The word "interfacing" as applied to digital electronics usually means:
- a conditioning circuit connected between a standard ttl nand gate and a standard ttl or gate
- a circuit connected between the driver and load to condition a signal so that it is compatible with the load
- any gate that is a ttl operational amplifier designed to condition signals between nmostransistors
- any ttl circuit that is an input buffer stage
Q14 | The rise time (tr) is the time it takes for a pulse to rise from its point up to its point. The fall time (tf) is the length of time it takes to fall from the to the point.
- 10%, 90%,90%, 10%
- 90%, 10%,10%, 90%
- 20%, 80%,80%, 20%
- 10%,70.7%,70.7%,10%
Q15 | The term buffer/driver signifies the ability to provide low output currents to drive light loads.
- true
- false
Q16 | PMOS and NMOS .
- represent mosfetdevices utilizing either p-channel or n- channel devices exclusively within a given gate
- are enhancement-type cmos devices used to produce a series of high-speed logic known as 74hc
- represent positive and negative mos-type devices, which can be operated from differential power supplies and are compatible with operational amplifiers
- none of the above
Q17 | Why is the operating frequency for CMOS devices critical for determining power dissipation?
- at low frequencies, at low frequencies, power dissipation increases.
- at high frequencies, the gate will only be able to deliver70.7 % of rated power.
- at high frequencies, charging and discharging the gate capacitance will draw a heavy current from the power supply and thus increase power dissipation.
- at high frequencie s, the gate will only be able to deliver70.7 % of rated powerand charging and dischargin g the gate capacitanc e will draw a heavy current from the power supply and thus increase powerdissipation.
Q18 | Ten TTL loads per TTL driver is known as:
- noise immunity
- fan-out
- power dissipation
- propagatio n delay
Q19 | The problem of different current requirements when CMOS logic circuits are driving TTL logic circuits can usually be overcome by the addition of:
- a cmosinverting bilateral switch between the stages
- a ttltristate inverting buffer between the stages
- a cmosnoninverting bilateral switch between the stages
- a cmosbuffer or inverting buffer
Q20 | Totem-pole outputs be connected because .
- can, in parallel, sometimes higher current is required
- cannot, together, if the outputs are in opposite states excessively high currents can damage one or both devices
- should, in series, certain applications may require higher output voltage
- can, together, together they can handle larger load currents and higher output voltages
Q21 | The high input impedance of MOSFETs:
- allows faster switching
- reduces input current and power dissipation
- prevents dense packing
- creates low-noise reactions
Q22 | The output current capability of a single 7400 NAND gate when HIGH is called
- source current
- sink current
- ioh
- source current of ioh
Q23 | The time needed for an output to change from the result of an input change is known as:
- noise immunity
- fan-out
- propagation delay
- rise time
Q24 | The problem of interfacing IC logic families that have different supply voltages (VCC's) can be solved by using a:
- level-shifter
- tristate shifter
- decoupling capacitor
- pull-down resistor
Q25 | What is the advantage of using low-power Schottky (LS) over standard TTL logic?
- more power dissipation
- less power dissipation
- cost is less
- cost is more