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This set of Digital Electronics Multiple Choice Questions & Answers (MCQs) focuses on Digital Electronics Set 17

Q1 | For programmable logic functions, which type of PLD should be used?
  • pla
  • pal
  • cpld
  • sld
Q2 | The complex programmable logic device contains several PLD blocks and                      
  • a language compiler
  • and/or arrays
  • global interconnection matrix
  • field-programmable switches
Q3 | Which type of device FPGA are?
  • sld
  • srom
  • eprom
  • pld
Q4 | The difference between a PAL & a PLA is
  • pals and plas are the same thing
  • the pla has a programmable or plane and a programmable and plane, while the pal only has a programmable and plane
  • the pal has a programmable or plane and a programmable and plane, while the pla only has a programmable and plane
  • the pal has more possible product terms than the pla
Q5 | If a PAL has been programmed once
  • its logic capacity is lost
  • its outputs are only active high
  • its outputs are only active low
  • it cannot be reprogrammed
Q6 | The FPGA refers to                          
  • first programmable gate array
  • field programmable gate array
  • first program gate array
  • field program gate array
Q7 | The full form of VLSI is                          
  • very long single integration
  • very least scale integration
  • very large scale integration
  • very long scale integration
Q8 | In FPGA, vertical and horizontal directions are separated by                          
  • a line
  • a channel
  • a strobe
  • a flip-flop
Q9 | Applications of PLAs are                            
  • registered pals
  • configurable pals
  • pal programming
  • all of the mentioned
Q10 | CMOS refers to                      
  • continuous metal oxide semiconductor
  • complementary metal oxide semiconductor
  • centred metal oxide semiconductor
  • concrete metal oxide semiconductor
Q11 | Propagation delay is defined as
  • the time taken for the output of a gate to change after the inputs have changed
  • the time taken for the input of a gate to change after the outputs have changed
  • the time taken for the input of a gate to change after the intermediates have changed
  • the time taken for the output of a gate to change after the intermediates have changed
Q12 | Propagation delay times can be divided as
  • t(plh) and t(lph)
  • t(lph) and t(phl)
  • t(plh) and t(phl)
  • t(hpl) and t(lph)
Q13 | Power Dissipation in DIC is expressed in
  • watts or kilowatts
  • milliwatts or nanowatts
  • db
  • mdb
Q14 | Fan-in is defined as                      
  • the number of outputs connected to gate without any degradation in the voltage levels
  • the number of inputs connected to gate without any degradation in the voltage levels
  • the number of outputs connected to gate with degradation in the voltage levels
  • the number of inputs connected to gate with degradation in the voltage levels
Q15 | The maximum noise voltage that may appear at the input of a logic gate without changing the logical state of its output is termed as                      
  • noise margin
  • noise immunity
  • white noise
  • signal to noise ratio
Q16 | The full form of ECL is                      
  • emitter-collector logic
  • emitter-complementary logic
  • emitter-coupled logic
  • emitter-cored logic
Q17 | Which logic is the fastest of all the logic families?
  • ttl
  • ecl
  • htl
  • dtl
Q18 | The full form of CML is                      
  • complementary mode logic
  • current mode logic
  • collector mode logic
  • collector mixed logic
Q19 | In an ECL the output is taken from
  • emitter
  • base
  • collector
  • junction of emitter and base
Q20 | The ECL behaves as                      
  • not gate
  • nor gate
  • nand gate
  • and gate
Q21 | In ECL the fanout capability is
  • high
  • low
  • zero
  • sometimes high and sometimes low
Q22 | ECL’s major disadvantage is that
  • it requires more power
  • it’s fanout capability is high
  • it creates more noise
  • it is slow
Q23 | The full form of SCFL is                      
  • source-collector logic
  • source-coupled logic
  • source-complementary logic
  • source cored logic
Q24 | The equivalent of emitter-coupled logic made out of FETs is called                      
  • cml
  • scfl
  • fecl
  • efcl
Q25 | ECL was invented in                by
  • 1956, baker clamp
  • 1976, james r. biard
  • 1956, hannon s. yourke
  • 1976, yourke